Assignors: CHANDA, ANUPAM, THAKKAR, PANKAJ Publication of US20170093618A1 publication Critical patent/US20170093618A1/en Application granted granted Critical Publication of US9979593B2 publication Critical patent/US9979593B2/en Status Active legal-status Critical Current Adjusted expiration legal-status Critical Links ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.) Filing date Publication date Priority to US201562235533P priority Critical Application filed by Nicira Inc filed Critical Nicira Inc Priority to US14/945,329 priority patent/US9979593B2/en Assigned to NICIRA, INC. Original Assignee Nicira Inc Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.) ( en Inventor Anupam Chanda Pankaj THAKKAR Current Assignee (The listed assignees may be inaccurate.
Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.) Active, expires Application number US14/945,329 Other versions US20170093618A1
Google Patents Logical 元 processing for L2 hardware switchesĭownload PDF Info Publication number US9979593B2 US9979593B2 US14/945,329 US201514945329A US9979593B2 US 9979593 B2 US9979593 B2 US 9979593B2 US 201514945329 A US201514945329 A US 201514945329A US 9979593 B2 US9979593 B2 US 9979593B2 Authority US United States Prior art keywords logical packet switch mac address mfe Prior art date Legal status (The legal status is an assumption and is not a legal conclusion. Google Patents US9979593B2 - Logical 元 processing for L2 hardware switches US9979593B2 - Logical 元 processing for L2 hardware switches
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